FaStack® RISC Microcontroller Prototype

* Four 8-bit bi-directional ports
* 256 Bytes of "Scratch Pad" memory
* Three 16-bit timer/counters
* Interrupt controller with 12 interrupt sources and 4 priority levels
* 15-bit programmable watchdog timer
* Core 8-bit arithmetic logic unit and 16-bit multiplication division unit
* Two full-duplex serial ports
* Four capture/compare units to generate pulse width modulated signals
* Special Function Register (SFR) interface, serving up to 50 SFR devices

Tezzaron Semiconductor's prototype microcontroller features a layer of stacked integrated SRAM for additional Data and Program memory.  The 8-bit microcontroller runs at clock speeds of up to 200 MHz.  It executes all ASM51 instructions and uses the same instruction set as the 8031, using a Reduced Instruction Set Computer (RISC) core so that many of its instructions are executed in a single clock cycle.  This provides a significant speed advantage over traditional 8051 devices that execute an instruction every twelve clock cycles.   It also features extended 32-bit capabilities including an IEEE 754-compliant floating-point coprocessor with comparator, a multiply/divide unit, a population counter, and a leading-zero counter.

This fully functional prototype has been demonstrated at conferences around the world since its creation in 2004.  Tezzaron's patented FaStack® wafer stacking technology was used to bond 128 KB of high-speed SRAM layer over the processor.  The successful creation of this revolutionary 3D-IC confirmed the potential of FaStack technology for new generations of cutting-edge devices.