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3D RAM Prototype

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Tezzaron's first 3D stacked prototype is a two-layer register file - a type of RAM.

Click on any picture to see a larger image

August, 2004 - before stacking

This is the face of one circuit layer, before stacking (actual size: 2mm x 2mm).
RegisterCircuit.jpg (25256 bytes)
November, 2004 - after stacking

When the first register file chips came off the line, this simple test circuit proved that the chips were "alive."
RegisterTestBD.JPG (37793 bytes)
November, 2004

A complete demonstration platform was created to exercise the functionality of the register file chip. The chip itself is housed under the bright gold square at the top of the picture. 
RegisterDemoBD.JPG (53924 bytes)
November, 2004

A magnified view of the top of the bare chip (actual size: 2mm x 2mm). The surface of the chip looks quite blank because the circuitry is on the inside, between the layers of the stack. The small gold squares are probe points for testing.
Register.JPG (48450 bytes)
November, 2004

A highly magnified view of five of the chip's connectors.
RegisterFeet.JPG (35188 bytes)
November, 2004

In development, the register file chip was code-named "Orion." A tiny diagram of the constellation was designed into the top of the chip.
Orion.jpg (17306 bytes)

 

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Copyright © 2004-2005 Tezzaron® Semiconductor. All rights reserved.  Revised: January 10, 2008
 

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