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3D-IC Microcontroller Prototype

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Click on any picture to see a larger image

August, 2004 - before stacking:

The bottom layer of the stack contains circuitry for an 8051-style processor.

Processor.jpg (129664 bytes)
August, 2004 - before stacking:

The upper layer of the stack contains SRAM memory circuits.

Memory.jpg (274520 bytes)
November, 2004 - after stacking:

This is the lower left corner of the bare chip - a highly magnified view (actual size 4mm x 4mm). The surface is quite blank because all the circuitry is inside the stack.

BareDie.jpg (14430 bytes)
Here the chip is mounted in its test package. The protective cover was held open for this photo with a bit of tape. InPackage.jpg (14750 bytes)
A demo board was designed specifically to showcase the new processor, which is under the yellow square to the left of center in this photo. DemoBoard.jpg (37743 bytes)
The demo generates complex "mandelbrot" patterns, running head-to-head with a standard 8051-type processor. The Tezzaron processor generates patterns about 3 times faster than the standard processor. This photo shows the demo being run at the CAST booth of the 2005 DAC show in California. DACb.jpg (49854 bytes)

 

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Copyright © 2004-2010 Tezzaron® Semiconductor. All rights reserved.  Revised: May 12, 2011
 

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