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3D Stacked Synchronous Burst SRAM

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Click on any picture to see a larger image

August, 2004 - before stacking:

The memory layer contains 128 Kbytes (1 Mbit) of SRAM memory circuits.

Memory.jpg (274520 bytes)
August, 2004 - before stacking:

The controller layer contains logic circuitry.

SRAMcontroller.jpg (18561 bytes)
November, 2004 - after stacking:

This is the lower right corner of a bare two-layer chip - a highly magnified view (actual size 4mm x 4mm). The surface is quite blank because all the circuitry is inside the stack.

BareSRAM.jpg (11566 bytes)
November, 2004 - after stacking:

Here a two-layer chip is mounted in its package.

3DSRAM.jpg (28569 bytes)
 
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Copyright © 2004-2005 Tezzaron® Semiconductor. All rights reserved.  Revised: January 10, 2008
 

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