Another Giant Step Toward 3-D Silicon
Vertical interconnects are tiny, precise, abundant

Naperville, IL - June 29, 2003

A set of multi-wafer stacks - the first ever built with vertical through-silicon connections - demonstrates the electrical connectivity needed for tightly integrated 3-D semiconductor chips.  The wafer stacks were created by Tachyon Semiconductor (Singapore) Pte. Ltd. using proprietary processes developed by that company.

Before being bonded into a stack, each wafer was patterned with tiny connectors (Super-Vias™) embedded vertically in the silicon.  Some of the Super-Vias were positioned to pierce only one wafer; others were designed to interconnect with Super-Vias on other wafers.  Meticulous wafer alignment during the bonding process allowed these Super-Vias to interconnect according to design, creating conductive paths that pierced two or more wafers.

In addition to providing electrical connectivity, Super-Vias address the worrisome issue of thermal buildup.  Copper Super-Vias act as efficient radiators, dissipating heat that would otherwise be trapped between the silicon layers.  Tachyon also minimizes thermal buildup by ultra-thinning each bonded wafer to a depth of only 13 microns.

Each of Tachyon's latest wafer stacks contains 3 or 4 eight-inch wafers.  The Super-Vias are 4 microns in diameter, embedded at densities as high as 14,000 per square millimeter.  Cross-section micrographs reveal wafer alignment that is precise to within 1/3 micron, providing ample overlap for connectivity; Tachyon believes that future stacks can be built with smaller Super-Vias at higher densities.  Greatly encouraged by the properties of these wafer stacks, Tachyon plans to build functional 3-D prototype chips before the end of the year.

Tachyon Semiconductor (Singapore) Pte. Ltd. is a wholly owned subsidiary of Tezzaron (formerly Tachyon) Semiconductor Corporation in Naperville, Illinois.  For more information about these companies, visit www.tezzaron.com.

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