Page Contents

Single data rate mode timing  

AC Characteristics 

FAQ

Single data rate mode timing for the 90 nm 3T-iRAM prototype (PSiRAM:

AC Characteristics @ TA from 0°C ~ 70°C:

3T-iRAM® FAQ:

SPEED QUESTIONS MEMORY COMPARISONS PRODUCTION QUESTIONS OTHER 3T-iRAM SPECIFICATIONS CONTACT

SPEED QUESTIONS

Q: Your press release claims 1ns cycle time and 1.3ns latency.  What exactly does this mean?

A: The 3T-iRAM prototypes (PSiRAM) can take up to a 1 GHz differential clock at the input pins. There is a single pipeline stage; the data is available at the output pins 300ps after the rising edge of the next clock. Therefore, latency is 1 clock (1ns) plus 300ps, or a total of 1.3ns.  See the timing diagram above.

Q: Is that timing for full random access or for page type modes?

A: 1.3ns is for full random access.

Q: I saw something about 400MHz operation.  Does the 90nm part run at 400MHz or 1GHz?

A: The 90nm 3T-iRAM prototype (PSiRAM) operates at (and was designed for) 1GHz operation at 1.2V.  However, the part has also been tested at a lower voltage, 0.8V; at this voltage, it will operate at 400MHz.

Q: Can I run 3T-iRAM slower than 1GHz?

A: Yes.  We will offer two types of 3T-iRAM: Type 1 is an SRAM drop-in replacement, and Type 2 uses an externally-controlled refresh.  Type 1 (SRAM replacement) is designed to operate over a full speed range from DC to full rated speed.  Type 2 (external refresh) may be run at any speed up to the full rated speed, provided that the refresh requirements are met.

MEMORY COMPARISONS

Q: Is 3T-iRAM a kind of SRAM, or is it DRAM?

A: 3T-iRAM is closer to DRAM, but it has some unique properties. It is dynamic in that refresh is required, but 3T-iRAM reads are nondestructive (unlike DRAM reads).  Whereas DRAM uses voltage deflection on a bit-line pair, 3T-iRAM provides a real positive current drive.  This positive drive reduces noise sensitivity and increases speed.

Q: Is 3T-iRAM faster than SRAM?

A: Yes, it generally is.  The higher speed is mostly due to 3T-iRAM's smaller cell size, lower bit-line capacitance, and better bit-line drive from the memory cells.  Even with the addition of hidden refresh, 3T-iRAM will perform at least as fast as SRAM, in a much smaller area, and using less power.

Q: How does 3T-iRAM compare to 1T SRAM?

A: 1T SRAM provides a cell size similar to that of 3T-iRAM, but 3T-iRAM provides better speed - in fact, the speed of 1T SRAM is comparable to that of ordinary DRAM of the same array size.

Q: Is 3T-iRAM a good replacement for all types of SRAMs?

A: Different types of SRAMs require different replacements.  The first 3T-iRAM parts, built in a standard CMOS logic process, can replace high-speed SRAMs.  Another version of 3T-iRAM, already under development, is optimized for incorporation in an embedded DRAM process; this version will be better for replacing large, low-power SRAMs.  The latter version will achieve lower power and higher density than is available with any DRAM or SRAM structure.

PRODUCTION QUESTIONS

Q: What processes have been used with the 3T-iRAM technology?

A: We have run 3T-iRAM components in 0.5µm, 0.35µm, 0.25µm, and now 90nm processes;  0.18µm and 0.13µm parts are in progress.

Q: Has Tezzaron ever done any production 3T-iRAM?

A: Yes.  Proprietary memory blocks that incorporate 3T-iRAM technology have been in volume production for over three years.

Q: Can this be built in any fab?

A: Yes.  Tezzaron has produced 3T-iRAM components in no fewer than 5 different foundries and 6 different processes.

Q: Is any special processing required?

A: No.  All 3T-iRAM parts to date have used standard single poly CMOS processing.  Tezzaron is in discussions with some manufacturers about higher-performance parts; if these are developed, they could require unique processing.

Q: Can 3T-iRAM be built in a DRAM Fab?

A: Yes.  While Tezzaron has so far concentrated on maximum portability, 3T-iRAM can easily be altered to run in a DRAM fabrication process.

OTHER 3Ti-RAM SPECIFICATIONS

Q: What voltage does 3T-iRAM use?

A: 3T-iRAM operating voltage depends on the process in which it is made.  The 90nm prototype was designed for 1.2V operation, whereas the 0.5µm part previously created ran at 5V.  In general, the lowest possible operating voltage is 2.5 to 3 times the threshold voltage (Vt).

Q: What is array efficiency, and how does 3T-iRAM measure up?

A: Array efficiency is a measurement of how much area in a memory block is used by memory cells compared to the area used by drivers, sense amps, and other required support circuitry.  The highest performance 3T-iRAM has array efficiencies in the 75% range.  Other versions of 3T-iRAM (with somewhat slower performance) can reach efficiencies of 90%.

Q: What is the bit cell size?

A: In a 90nm process, the 3T-iRAM bit-cell size is 0.59 square µm. For a rough estimate in any process, a 3T-iRAM bit-cell is just under 50% the size of an SRAM bit-cell.

Q: How sensitive to soft errors are 3T-iRAM parts?

A: 3T-iRAM parts built in a standard CMOS process are less sensitive than standard SRAMs but more sensitive than DRAMs.  Soft error sensitivity has a lot to do with the internal capacitance of the bit-cell: higher capacitance means lower susceptibility.  3T-iRAM in a standard CMOS process has 2 to 4 times the storage node capacitance of a standard SRAM in the same process.  Tezzaron is working on a version of 3T-iRAM to be built in an embedded DRAM process.  Among other significant benefits, this version should have a lower soft error rate than competitive standard DRAM solutions.

Q: Can I obtain 3T-iRAM for SOC integration?

A: Tezzaron is working with various parties to provide complete solutions for integration. In the near future, IP blocks will be made available on a select basis. Tezzaron hopes to have general availability of 3T-iRAM for SOC integration by mid 2004.

Q: Can 3T-iRAM be extended to dual port, multi-port, CAM, or other specialty memories?

A: Yes.  3T-iRAM is easily adapted to these and other memory architectures.

Q: How often do 3T-iRAM memory cells need to be refreshed?

A: This depends on a number of factors such as process, density and temperature range for operation. Typically, the refresh period is tens to hundreds of microseconds in a standard CMOS process. The "SRAM-replacement" 3T-iRAM parts feature completely hidden refresh.

Q: Is the standard 3T-iRAM bit-cell single-port or dual-port memory?

A: Neither: 3T-iRAM is best described as "port and half" memory.  Each 3T bit-cell has independent read and write bit-lines and control signals, allowing some overlapping of functions.  A standard 3T-iRAM bit-cell has more overlap capability than a typical single-port bit-cell, but not as much as a true dual-port bit-cell. Hence "port and a half".

Q: Can I get a data sheet?

A: Data sheets for production parts will be made available upon request. The first parts will be in production in the first half of 2004. Contact: memory@tezzaron.com.

Q: What densities are planned?

A: Tezzaron plans to produce devices up to 144Mb in 2004. Larger sizes, up to 288Mb, are possible and may be produced based on market demand.

Q: Are there currently any second sources for 3T-iRAM parts?