Bi-STAR™ is a patented technology for continuous
on-chip testing and repair of memory.
It reduces manufacturing cost, increases yield, and vastly
improves the reliability of memory chips.
Bi-STAR™ consists of a processor, software, and
support circuitry, all embedded on a memory chip.
These elements test and repair the chip at power-up and then
continuously monitor, test, and repair the chip “on-the-fly” during
normal use. The silicon
area overhead for Bi-STAR™ is less than one square millimeter (in 0.13
micron process).
Power-Up Self-Test and Repair
At each power-up, Bi-STAR™ tests the entire memory
chip – every line driver, secondary bus driver, CAM, and sense
amplifier. Word lines and
bit lines are tested for shorts; bit capacitors are checked for leaks.
The tests can be set to generate and compare virtually any memory
patterns in virtually any address sequence(s).
After testing, the processor repairs the chip’s
memory, using a flexible remapping scheme.
The processor views all of memory as a collection of bits,
performing logical-to-physical CAM mapping on every access. The “good” bits are organized into two areas – a memory
block of the appropriate size, and a pool of redundant bits. “Bad” bits are mapped out and replaced with good bits
from the redundant bit pool. Bi-STAR’s
flexible mapping scheme allows replacements by row, by column, by
sub-array, and by individual bits.
Bi-STAR™ determines the best repair option for each bad area
detected. Sub-array
replacement is the most comprehensive option, mapping out an entire
section of the memory system including drivers, sense amplifiers, and
local decode and mapping structures.
Testing is performed in a massively parallel fashion,
taking full advantage of the chip’s internal bus bandwidth with a
“comparator per bit line” technique.
A one-Gigabit implementation could test ~300,000 bits per access,
pipelined at 5 nanosecond cycles; this arrangement could run ~400 test
patterns and still complete the testing and remapping in only 32
milliseconds.
Transparent Background Scrubbing
During normal processing, the embedded Bi-STAR
microprocessor runs continually in the background, “scrubbing” the
chip to detect and correct “soft” errors.
For a 1 Gigabit chip, complete memory scrubbing occurs every
2 minutes.
Soft errors (random bit-flips) can occur at any time,
usually caused by background radiation.
Soft error rates are affected by memory capacity, altitude,
silicon geometry, environment, etc.
Bi-STAR™ searches for single-bit soft errors.
If detected, a soft error is corrected by re-writing the affected
bit with its correct value.
Bi-STAR™ tracks the occurrence and location of soft
errors. If a bit (or an
area) experiences frequent soft errors, Bi-STAR™ flags the bit (or
area) as unreliable, and schedules a repair.
During the next refresh cycle, remapping is done on-the-fly,
using replacements from the redundant bit pool.
Scrubbing, error detection/correction, and repair are performed on-chip,
without using system resources; the Bi-STAR™ functions do not
interfere with normal memory access, and are completely transparent to
the rest of the system.
Reporting
If desired, Bi-STAR™ can be configured to report
errors and conditions. In
critical applications or harsh environments, this feature would allow
failing parts to be detected and replaced before Bi-STAR™ exhausts its
pool of redundant bits. Bi-STAR™
reporting can use any of several formats, including SMBus-compliant
formats, and can be enabled during power-on testing and/or during normal
operation.
Comparison
Redundant memory areas are common to all memory chips,
but remapping is usually performed in a coarse-grained manner, perhaps
four rows or columns at a time. This
means that a single bad bit consumes a large amount of redundant memory;
a mere handful of widely separated bad bits can exhaust the redundant
memory area and render the chip useless.
Some chips allow finer remapping, using single rows or columns,
but only Bi-STAR’s flexible fine-grained remapping can replace
individual bits as well as rows, columns, or sub-arrays.
The result is a much more efficient use of redundant bits.
Virtually all memory chips require expensive external
test equipment, along with manual probe-testing to connect the chips to
the equipment. Once the
equipment is connected, testing speed is limited by the bandwidth of the
connection. Bi-STAR™
eliminates the cost of the equipment and the time and skill required for
manual probing; it also reduces the time spent in actual testing by
several orders of magnitude.
Most memory chips are tested for repair and remap only
once, on the production line. If
a bit becomes “stuck” at a later time (due to magnetism, radiation,
heat, impact, or other damage) it cannot be repaired; the entire chip
must be replaced. With Bi-STAR™,
these “hard” bit errors are detected and remapped within minutes.
A few state-of the-art memory chips include on-board
processors for hard error testing and repair/remapping.
These processors perform coarse-grained repairs at the factory or
at power-up. At present,
only Bi-STAR™ performs fine-grained remapping, and only Bi-STAR™ can
repair hard errors on-the-fly.
Memory devices without Bi-STAR™ ignore the random,
recoverable bit-flips caused by radiation; if a bit is flipped, the
error remains until a new value is written to that location.
Some processor chipsets use ECC (error checking and correction)
or EDAC (error detection and correction) to detect and correct these “soft” errors in their memory banks, but
this adds significant complexity and cost.
Bi-STAR’s on-board memory scrubbing performs this function
without using any system resources, and it runs faster than system-level
ECC/EDAC by several orders of magnitude.
Because it continually monitors chip performance,
Bi-STAR™ can detect and report unreliable behavior long before the
chip actually fails. No
other memory system provides an on-chip reporting feature.
Cost Benefits
For the manufacturer, Bi-STAR™
reduces costs in several ways:
